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1. Education [cv-education]

KU Leuven, PhD in Physics
Oct 2025 – now
My work takes place industrially in AttoLab and the EXLIMIT team at imec. Working title: Surface-Enhanced IR Spectroscopy of Ultrafast EUV Chemistry in Thin Films.

KU Leuven, MSc in Nanotechnology, Nanoscience and Nanoengineering
Sept 2023 – Sept 2025
Quantum engineering, materials and technology track, graduated cum laude

KU Leuven, MSc in Electronics and ICT Engineering Technology
Sept 2022 – July 2023
Focus on embedded hardware, graduated magna cum laude

KU Leuven, BSc in Electronics and ICT Engineering Technology
Sept 2019 – July 2022
Graduated cum laude

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    Curriculum vitæ [cv]

      1. Education [cv-education]

      KU Leuven, PhD in Physics
      Oct 2025 – now
      My work takes place industrially in AttoLab and the EXLIMIT team at imec. Working title: Surface-Enhanced IR Spectroscopy of Ultrafast EUV Chemistry in Thin Films.

      KU Leuven, MSc in Nanotechnology, Nanoscience and Nanoengineering
      Sept 2023 – Sept 2025
      Quantum engineering, materials and technology track, graduated cum laude

      KU Leuven, MSc in Electronics and ICT Engineering Technology
      Sept 2022 – July 2023
      Focus on embedded hardware, graduated magna cum laude

      KU Leuven, BSc in Electronics and ICT Engineering Technology
      Sept 2019 – July 2022
      Graduated cum laude

      2. Experience [cv-experience]

      Hardware Intern – Nokia Bell Labs
      July 2025

      Thesis Student – imec
      July 2024 – Aug. 2025
      Designing nanostructured arrays for ultrafast surface-enhanced spectroscopies of EUV photoresists. Spent a year inside of Lumerical FDTD. Some manual cleanroom work (dicing wafers, spin-coating resists on coupons) and exposing coupons to EUV radiation.

      Research Intern – imec
      February 2024 – May 2024
      Worked on a design for a holographic reconstruction apparatus by using a phase light modulator.

      Thesis Student – SABCA
      August 2022 – May 2023
      Created an RTL design in VHDL that executes the control systems implemented on the Control Loop Processor (CLP) for a thrust vector control system. Target: Microsemi IGLOO2 FPGA. Implemented peripherals to communicate with an onboard computer (MIL-STD-1553 RT using an IP core) and to perform data acquisition (ADC and SPI). Conducted performance and output comparisons with a cycle-accurate model of the CLP with testbenches developed in SystemVerilog simulated in ModelSim

      Avionics Software Engineering Intern – ScioTeq
      July 2021
      Worked on optimizing and abstracting hardware test cases using C# and in-house software for an avionics display unit.

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